Novel Flip-Flops and Johnson Counter Design

Flip-Flop_1: Firstly, the old flip-flop construction that we choose to implement is the classic single edge triggered flip-flop (SETFF) which is shown in FIGURE 10.24 in the book " CMOS VLSI Design A Circuits and Systems Perspective " 4th Edition. The figure is shown below. Fig A-1 Resettable Flip-Flop The schematic that we construct is shown as follows: Fig A-2 Resettable Flip-Flop Schematic The input signals in this figure are clk, D and rst and output is Q. We firstly input the clk and D signals of the same frequencies but the output waveform is extremely bad with a lot of spikes that severely interfere with flip-flop's function. When the frequency of D is twice of that of clk, the output signal is very ideal as follows: